Semiconductor memory devices, including flash memory devices, typically utilize memory cells to store data as an electrical value, such as an electrical charge or a voltage. A flash memory cell, for example, includes a single transistor with a floating gate that is used to store a charge representative of one or more data values. Increases in storage density have been facilitated in various ways, including increasing the density of memory cells, enabled by reductions in the minimum feature sizes of the semiconductor manufacturing processes used to manufacture flash memory devices, and transitioning from single-level flash memory cells to multi-level flash memory cells, so that two or more bits can be stored by each flash memory cell.
A drawback of increasing storage density is that the stored data is more prone to being stored and/or read erroneously. Error control coding (“ECC”) has been utilized to limit the number of uncorrectable errors that are introduced by pseudo-random fluctuations, defects in the storage medium, operating conditions, device history, and/or write-read circuitry, etc. Error control methods using soft information are particularly promising because soft information decoding may improve the error detection and correction capability of a particular error control code, and thus the capacity of the system. However, the utilization of soft information decoding has a number of previously irresolvable drawbacks. For example, soft information decoding implementations tend to introduce undesirable delays (i.e., latencies), have relatively large semiconductor footprints, and are generally power and memory intensive.